#c_lang #aarch64 #arduino #arm #embedded #esp32 #esp8266 #interpreter #iot #mips #risc_v #runtime #wasi #wasm #webassembly

https://github.com/wasm3/wasm3

#scala #chisel3 #risc_v #microarchitecture

https://github.com/OpenXiangShan/XiangShan

#cplusplus #cryptography #risc_v #rust #stark #virtual_machine #zero_knowledge

https://github.com/risc0/risc0

#scala #chisel #microarchitecture #risc_v

XiangShan is an open-source project for a high-performance RISC-V processor. It offers detailed documentation, technical slides, and tutorials to help users understand and work with the processor. The project uses agile development methods, which makes it faster and more efficient to develop and test the chip. Users can access various versions of the processor's micro-architecture, such as Yanqihu, Nanhu, and the ongoing development of Kunminghu. The project also provides tools for simulation, debugging, and performance validation, making it beneficial for developers and researchers who need a flexible and powerful processor design.

https://github.com/OpenXiangShan/XiangShan

#cplusplus #aarch64 #android #arm32 #asr #cpp #csharp #dotnet #ios #lazarus #linux #macos #mfc #object_pascal #onnx #raspberry_pi #risc_v #speech_to_text #text_to_speech #vits #windows

This tool supports various speech functions like speech recognition, text-to-speech, speaker identification, and more. It works on multiple platforms including Android, iOS, Windows, macOS, and Linux, and supports several programming languages such as C++, Python, JavaScript, and others. You can use it locally or through web assembly, making it versatile and convenient. This benefits you by allowing you to integrate advanced speech capabilities into your projects easily, regardless of the platform or programming language you use.

https://github.com/k2-fsa/sherpa-onnx

#verilog #cocotb #embedded #fpga #iss #risc_v #rtl #verilator #verilog #vpn #vproc #wireguard

This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments.

https://github.com/chili-chips-ba/wireguard-fpga